Quartus II software v11.1 delivers new digital signal processing (DSP) support:
- Simple design flow for loop-based designs with variable latency delay and loadable counter
- New floating point design example - single and multi-channel Cholesky solvers
- New external memory interface support including DDR3 simulation and master interface generation
- Enhanced floating point testbench with verification script support
- Improved performance for Stratix V and Arria V FIR implementation
- Faster system regeneration
VIP Suite IP in v11.1 – New support in Deinterlacer II
- Supports 2:2 cadence detection
